Recent developments in digital technologies have brought higher functionality to electronic hardware such as portable information devices and home information appliances. To keep pace with the trend of electronic hardware toward higher functionality and mobilization, miniaturization and power saving technologies for semiconductor elements for use in electronic hardware are making rapid progress. Above all, the market of flash memories, capable of storing vast amounts of data as a memory element, is rapidly expanding. However, it is thought that the miniaturization of flash memories will reach a limit in the near future because of the need to ensure the reliability of the gate oxide film. “Post-flash memories” that will replace the flash memories are resistance-change memories such as PCRAM (Phase Change RAM) and ReRAM (Resistive switching RAM). These memories incorporate, as a device film, a variable resistance film having such a characteristic that resistance can be changed by application of electric pulses. In particular, ReRAM is drawing attention as a cross-point type constituent device suited for miniaturization, and devices including a variable resistance film as a storage section have been proposed (see e.g., Patent Document 1). There have also been proposed elements that use a variable resistance film in combination with diodes (see e.g., Patent Document 2).
FIG. 26 is a sectional perspective view showing a major part of a first known cross-point type nonvolatile memory element (hereinafter referred to as “first prior art technique”). As illustrated in FIG. 26, the first prior art technique is provided with a plurality of first wires 101 that extend in a specified direction so as to be parallel to one another. Also, a plurality of second wires 102 are provided, extending so as to intersect the first wires 101. In each region where a first wire 101 and a second wire 102 intersect each other, a variable resistance film 103 is provided. Miniaturized cells and therefore a large capacity nonvolatile memory element can be achieved by employing the above cross-point configuration without use of selective transistors.
FIG. 27 is a sectional perspective view showing a major part of a second known nonvolatile memory element (hereinafter referred to as “second prior art technique”). As illustrated in FIG. 27, in the second prior art technique, first wires 104 and second wires 105 are provided so as to intersect each other. In each region where a first wire 104 and a second wire 105 intersect each other, a diode material 106 having a rectifying characteristic and a variable resistance film 107 are provided. Provision of a diode material in each cell of a cross-point configuration enables it to prevent a flow of sneak current into adjacent cells during read-out and write-in.
Patent Document 1: U.S. Pat. No. 6,850,429 Specification
Patent Document 2: U.S. Pat. No. 6,185,122 Specification